Design Seminar for Digital Platforms (B-KUL-H0Q34A)

3 ECTSEnglish60 First term
Dehaene Wim (coordinator) |  Dehaene Wim |  N. |  Verplancke Joost (substitute)
POC Cybersecurity

During the design seminar, the students will learn hands-on to select the best digital platform for a given application. It consists of the following steps:

• Step 1: the given application is implemented on a small micro-controller in software. This will typically be C on an 8-bit or 16-bit micro-controller. Its SW performance is measured.

• Step 2: the C-version is further optimized in assembly if the performance goals are not reached. This task will give them insight into performance losses due to software compilers.

• Step 3: students will make a HW/SW co-design project. A dedicated hardware block, either as co-processor, or instruction set extension, is made for the time critical parts of the application. Since there is a large design space, students have to choose themselves the split between HW and SW, based on the performance results obtained in the previous steps.

• Step 4: HW/SW co-simulation of the final design is made. And if time permits, it is downloaded on an FPGA.

• Step 5: Students have to present their design to their fellow students. Important trade-offs, design decisions and critical evaluation are discussed.

Activities

3 ects. Design of Digital Platforms: Design Seminar (B-KUL-H09I1a)

3 ECTSEnglishFormat: Assignment60 First term
Dehaene Wim |  N. |  Verplancke Joost (substitute)
POC Elektrotechniek

During the design seminar, the students will learn hands-on to select the best digital platform for a given application. It consists of the following steps:

  • Step 1: the given application is implemented on a small micro-controller in software. This will typically be C on an 8-bit or 16-bit micro-controller. Its SW performance is measured.
  • Step 2: the C-version is further optimized in assembly if the performance goals are not reached. This task will give them insight into performance losses due to software compilers.
  • Step 3: students will make a HW/SW co-design project. A dedicated hardware block, either as co-processor, or instruction set extension, is made for the time critical parts of the application. Since there is a large design space, students have to choose themselves the split between HW and SW, based on the performance results obtained in the previous steps.
  • Step 4: HW/SW co-simulation of the final design is made. And if time permits, it is downloaded on an FPGA.
  • Step 5: Students have to present their design to their fellow students. Important trade-offs, design decisions and critical evaluation are discussed.

All material and instructions are available on Toledo.

Evaluation

Evaluation: Design Seminar for Digital Platforms (B-KUL-H2Q34a)

Type : Continuous assessment without exam during the examination period
Description of evaluation : Project/Product, Report, Presentation


The design seminar part is evaluated with permanent evaluation: this means there is one intermediate presentation and one final presentation of the project results and there is one final report of the design.