Education

The pandemic has shown the importance of electronics and chips, and the need for technical skilled people that know how to design and develop a chip. In this course, KU Leuven and leading companies in the chip industry introduce you to the layout of analog chips, the software tools, reliability aspects of chips, and much more.

What can you find on this webpage?
Our (future) students can find information about admission requirements, objectives and evaluation.

All information with regard to the study programme can be found at the website of Micro-credential Layout of Analog Chips.

Objectives

• can draw the floorplan and layout of an analog chip, considering the electrical and reliability aspects typical for the domain of analog electronics,
• has insight in the fundamentals of CMOS technology and can discern the most important aspects of physical IC design,
• can execute the IC layout flow while taking into account its different aspects, such as LVS: Layout versus Schematic checking, DRC: Design Rule Checking and PEX: Parasitic extraction,
• has insight in the influence and outcome of different analog layout styles on reliability aspects like ESD, latch-up and electromigration,
• can discern the differences between various process options, such as SOI, BCD and FinFET,
• has insight in layout techniques for CMOS image sensors and their influence on image quality.

Educational quality of the study programme

Educational quality at study programme level

Educational quality at university level

• Consult the documents on educational quality available at university level.

• More information on the educational quality at KU Leuven
• More information on the available documents